Who This Is For

Software engineers who want stronger performance intuition and a better sense of what hardware constraints shape software behavior.

Prerequisites

General programming experience and comfort reading basic low-level concepts.

What You'll Get

  • Understand the big pieces of modern processor and memory-system design
  • Connect caches, pipelines, interrupts, virtual memory, and multicore behavior back to software performance
  • Make lower-level design and debugging decisions with better intuition

All Posts

  1. 1

    Computer Architecture 01 - Overview

    Core concepts of Von Neumann architecture and how CPU, memory, and buses work together

  2. 2

    Computer Architecture 02 - CPU Internals

    How the ALU, control unit, and datapath work together to execute instructions

  3. 3

    Computer Architecture 03 - Instruction Set Architecture (ISA)

    The role of ISAs, CISC vs RISC philosophy, and x86 versus ARM design differences

  4. 4

    Computer Architecture 04 - Pipelining and Parallel Processing

    Instruction pipelining, hazard handling, branch prediction, superscalar and out-of-order execution

  5. 5

    Computer Architecture 05 - CPU Privilege Levels and Protection

    Why CPUs distinguish privilege levels, and how x86 protection rings and ARM exception levels protect the system

  6. 6

    Computer Architecture 06 - Interrupts and Exceptions

    Why interrupts exist and how IDT, ISR, PIC/APIC work

  7. 7

    Computer Architecture 07 - Memory Hierarchy

    The memory hierarchy from registers to HDD and how caches work

  8. 8

    Computer Architecture 08 - Virtual Memory and MMU

    How virtual memory enables process isolation through the MMU, page tables, and TLB

  9. 9

    Computer Architecture 09 - I/O and DMA

    How the CPU exchanges data with external devices and the principles behind efficient data transfer via DMA

  10. 10

    Computer Architecture 10 - Multicore and Modern Processors

    Why clock speeds stopped increasing and the core concepts of modern multicore processor architecture